IC Directory
THCS Series - GPIO/I2C Aggregators
THCS Series Part Numbers
THCS251 | 35bit GPIO Aggregator
THCS253 | 32bit GPIO/I2C Aggregator
THCS254 | 20bit GPIO/I2C Aggregator
THCS251 35bit GPIO Aggregator
Overview
The THCS251 integrates Serializer and Deserializer onto a single chip, which supports general purpose input and output (GPIO) signals through two pairs of differential signal.
GPIO sampling clock is selectable from external reference clock or internal oscillator clock.
The 8B10B encoding and decoding adopted by THCS251 is easy to connect to optical / wireless communication devices with high robustness and DC balanced signal.
The built-in adaptive equalizer enables flexible cable selection.
Features
Support up to 35-bits GPIO
Not required to input GPIO sampling clock in internal oscillator clock mode
Full duplex communication by two pairs of differential signal
Output buffer open-drain or push-pull selectable
Support up to 8-bits low speed GPIO in low power Standby mode
Integrated adaptive equalizer for long or lossy media
8B10B encoding and decoding
Configurable digital noise filter
Error detection and indication
External reference clock frequency: 9-100MHz
Spread Spectrum Clock Generator to reduce EMI
Operating single power supply voltage: 1.7 V -3.6 V
Wide range IO voltage: 1.7V - 3.6V
Operating ambient temperature: -40°C to 85°C
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The “-B” parts are in smaller MOQ. At Digi-Key, you can buy from 1 single piece.
THCS251 Datasheet | Design Guide | Buy
THEVA251-SMA-V2 Eval Board for THCS251 | User Manual | Ask
THEVA251-BF4-V1 Eval Board for THCS251 | User Manual | Ask
THEVA251-IX-B-V4 Eval Board for THCS251 | User Manual | Ask
THCS253 32bit GPIO/I2C Aggregator
Overview
The THCS253 is a transceiver IC with serializer and deserializer on a single chip that aggregates 32-bit GPIO and 2-wire serial interface signals and converts them into two pairs of differential signals for transmission and reception.
The THCS253 has two modes: SYNC mode and ASYNC mode. In SYNC mode, the uplink and downlink high-speed transmission signals operate synchronously, driven by the reference clock signal from the primary chip side. In ASYNC mode, the uplink and downlink high-speed transmission signals operate asynchronously, driven by the clock signals
from both the primary and secondary chips. The reference clock can be selected from either the internal OSC clock or the external input clock.
By accessing internal registers via the 2-wire serial interface, the 32-bit GPIO direction and output buffer type can be customized for each pin.
The 8B10B encoding and decoding used in the THCS253 provides high robustness, DC balanced signals, and easy connection to optical/wireless communication devices.
The built-in adaptive equalizer allows for flexible cable selection, and the CML driver with preemphasis allows for even longer cable transmissions.
Features
Up to 32-bit GPIOs
Internal oscillator mode requires no external clock signal input Uplink and downlink synchronous mode with one-sided reference clock drive
Uplink and downlink asynchronous mode with both side reference clocks driven
Output buffer selectable between open-drain and push-pull
2-wire serial interface fast mode can be bridged
Standby mode for low-power operation
Adaptive equalizer supports high-loss transmission media
8B10B encoding/decoding
Digital noise filters can be set for input and output
Error detection and notification
External reference clock frequency: 9-133.3MHz Built-in spread spectrum clock generator
Single power supply operation: 1.7 V - 3.6 V
Operating ambient temperature range: -40°C to 85°C
THCS253 Datasheet | Design Guide | Buy (Coming Soon)
THEVA253-SMA-V1 Eval Board for THCS253 | User Manual | Buy (Coming Soon)
THCS254 20bit GPIO/I2C Aggregator
Overview
The THCS254 is a transceiver IC with serializer and deserializer on a single chip that aggregates 20-bit GPIO and 2-wire serial interface signals and converts them into two pairs of differential signals for transmission and reception.
The THCS254 has two modes: SYNC mode and ASYNC mode. In SYNC mode, the uplink and downlink high-speed transmission signals operate synchronously, driven by the reference clock signal from the primary chip side. In ASYNC mode, the uplink and downlink high-speed transmission signals operate asynchronously, driven by the clock signals from both the primary and secondary chips. The reference clock can be selected from either the internal OSC clock or the external input clock.
By accessing internal registers via the 2-wire serial interface, the 20-bit GPIO direction and output buffer type can be customized for each pin.
The 8B10B encoding and decoding used in the THCS254 provides high robustness, DC balanced signals, and easy connection to optical/wireless communication devices.
The built-in adaptive equalizer allows for flexible cable selection, and the CML driver with preemphasis allows for even longer cable transmissions.
Features
Up to 20-bit GPIOs
Internal oscillator mode requires no external clock signal input
Uplink and downlink synchronous mode with one-sided reference clock drive
Uplink and downlink asynchronous mode with both side reference clocks driven
Output buffer selectable between open-drain and push-pull
2-wire serial interface fast mode can be bridged
Standby mode for low-power operation
Adaptive equalizer supports high-loss transmission media
8B10B encoding/decoding
Digital noise filters can be set for input and output
Error detection and notification
External reference clock frequency: 15-133.3MHz
Built-in spread spectrum clock generator
Single power supply operation: 1.7 V - 3.6 V
Operating ambient temperature range: -40°C to 85°C
THCS254 Datasheet | Design Guide | Buy (Coming Soon)
THEVA254-SMA-V1 Eval Board for THCS254 | User Manual | Buy (Coming Soon)